XilinxGenLib

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byucc.edif.libraries.xilinx
Class XilinxGenLib

java.lang.Object
  byucc.edif.libraries.xilinx.XilinxGenLib

Direct Known Subclasses:: XilinxLibrary

public class XilinxGenLib
extends java.lang.Object

This class is auto-generated - do not modify

Field Summary
`static EdifLibrary`	`library`

Constructor Summary
`XilinxGenLib()`

Method Summary
`static EdifCell`	`AND2()`
`static EdifCell`	`AND2B1()`
`static EdifCell`	`AND2B2()`
`static EdifCell`	`AND3()`
`static EdifCell`	`AND3B1()`
`static EdifCell`	`AND3B2()`
`static EdifCell`	`AND3B3()`
`static EdifCell`	`AND4()`
`static EdifCell`	`AND4B1()`
`static EdifCell`	`AND4B2()`
`static EdifCell`	`AND4B3()`
`static EdifCell`	`AND4B4()`
`static EdifCell`	`AND5()`
`static EdifCell`	`AND5B1()`
`static EdifCell`	`AND5B2()`
`static EdifCell`	`AND5B3()`
`static EdifCell`	`AND5B4()`
`static EdifCell`	`AND5B5()`
`static EdifCell`	`AND6()`
`static EdifCell`	`AND7()`
`static EdifCell`	`AND8()`
`static EdifCell`	`BSCAN_FPGACORE()`
`static EdifCell`	`BSCAN_SPARTAN2()`
`static EdifCell`	`BSCAN_SPARTAN3()`
`static EdifCell`	`BSCAN_VIRTEX()`
`static EdifCell`	`BSCAN_VIRTEX2()`
`static EdifCell`	`BUF()`
`static EdifCell`	`BUFCF()`
`static EdifCell`	`BUFE()`
`static EdifCell`	`BUFFOE()`
`static EdifCell`	`BUFG()`
`static EdifCell`	`BUFGCE_1()`
`static EdifCell`	`BUFGCE()`
`static EdifCell`	`BUFGDLL()`
`static EdifCell`	`BUFGMUX_1()`
`static EdifCell`	`BUFGMUX()`
`static EdifCell`	`BUFGP()`
`static EdifCell`	`BUFGSR()`
`static EdifCell`	`BUFGTS()`
`static EdifCell`	`BUFT()`
`static EdifCell`	`CAPTURE_FPGACORE()`
`static EdifCell`	`CAPTURE_SPARTAN2()`
`static EdifCell`	`CAPTURE_SPARTAN3()`
`static EdifCell`	`CAPTURE_VIRTEX()`
`static EdifCell`	`CAPTURE_VIRTEX2()`
`static EdifCell`	`CLK_DIV10()`
`static EdifCell`	`CLK_DIV10R()`
`static EdifCell`	`CLK_DIV10RSD()`
`static EdifCell`	`CLK_DIV10SD()`
`static EdifCell`	`CLK_DIV12()`
`static EdifCell`	`CLK_DIV12R()`
`static EdifCell`	`CLK_DIV12RSD()`
`static EdifCell`	`CLK_DIV12SD()`
`static EdifCell`	`CLK_DIV14()`
`static EdifCell`	`CLK_DIV14R()`
`static EdifCell`	`CLK_DIV14RSD()`
`static EdifCell`	`CLK_DIV14SD()`
`static EdifCell`	`CLK_DIV16()`
`static EdifCell`	`CLK_DIV16R()`
`static EdifCell`	`CLK_DIV16RSD()`
`static EdifCell`	`CLK_DIV16SD()`
`static EdifCell`	`CLK_DIV2()`
`static EdifCell`	`CLK_DIV2R()`
`static EdifCell`	`CLK_DIV2RSD()`
`static EdifCell`	`CLK_DIV2SD()`
`static EdifCell`	`CLK_DIV4()`
`static EdifCell`	`CLK_DIV4R()`
`static EdifCell`	`CLK_DIV4RSD()`
`static EdifCell`	`CLK_DIV4SD()`
`static EdifCell`	`CLK_DIV6()`
`static EdifCell`	`CLK_DIV6R()`
`static EdifCell`	`CLK_DIV6RSD()`
`static EdifCell`	`CLK_DIV6SD()`
`static EdifCell`	`CLK_DIV8()`
`static EdifCell`	`CLK_DIV8R()`
`static EdifCell`	`CLK_DIV8RSD()`
`static EdifCell`	`CLK_DIV8SD()`
`static EdifCell`	`CLKDLL()`
`static EdifCell`	`CLKDLLE()`
`static EdifCell`	`CLKDLLHF()`
`static EdifCell`	`CONFIG()`
`static EdifCell`	`DCC_FPGACORE_SWIFT_BUS()`
`static EdifCell`	`DCC_FPGACORE()`
`static EdifCell`	`DCM()`
`static EdifCell`	`FD_1()`
`static EdifCell`	`FD()`
`static EdifCell`	`FDC_1()`
`static EdifCell`	`FDC()`
`static EdifCell`	`FDCE_1()`
`static EdifCell`	`FDCE()`
`static EdifCell`	`FDCP_1()`
`static EdifCell`	`FDCP()`
`static EdifCell`	`FDCPE_1()`
`static EdifCell`	`FDCPE()`
`static EdifCell`	`FDCPX1()`
`static EdifCell`	`FDD()`
`static EdifCell`	`FDDC()`
`static EdifCell`	`FDDCE()`
`static EdifCell`	`FDDCP()`
`static EdifCell`	`FDDCPE()`
`static EdifCell`	`FDDP()`
`static EdifCell`	`FDDPE()`
`static EdifCell`	`FDDRCPE()`
`static EdifCell`	`FDDRRSE()`
`static EdifCell`	`FDE_1()`
`static EdifCell`	`FDE()`
`static EdifCell`	`FDP_1()`
`static EdifCell`	`FDP()`
`static EdifCell`	`FDPE_1()`
`static EdifCell`	`FDPE()`
`static EdifCell`	`FDR_1()`
`static EdifCell`	`FDR()`
`static EdifCell`	`FDRE_1()`
`static EdifCell`	`FDRE()`
`static EdifCell`	`FDRS_1()`
`static EdifCell`	`FDRS()`
`static EdifCell`	`FDRSE_1()`
`static EdifCell`	`FDRSE()`
`static EdifCell`	`FDS_1()`
`static EdifCell`	`FDS()`
`static EdifCell`	`FDSE_1()`
`static EdifCell`	`FDSE()`
`static EdifCell`	`FMAP()`
`static EdifCell`	`FPGA_startup()`
`static EdifCell`	`FTC()`
`static EdifCell`	`FTCP()`
`static EdifCell`	`FTP()`
`static EdifCell`	`GND()`
`static EdifCell`	`GT_AURORA_1()`
`static EdifCell`	`GT_AURORA_2()`
`static EdifCell`	`GT_AURORA_4()`
`static EdifCell`	`GT_CUSTOM()`
`static EdifCell`	`GT_ETHERNET_1()`
`static EdifCell`	`GT_ETHERNET_2()`
`static EdifCell`	`GT_ETHERNET_4()`
`static EdifCell`	`GT_FIBRE_CHAN_1()`
`static EdifCell`	`GT_FIBRE_CHAN_2()`
`static EdifCell`	`GT_FIBRE_CHAN_4()`
`static EdifCell`	`GT_INFINIBAND_1()`
`static EdifCell`	`GT_INFINIBAND_2()`
`static EdifCell`	`GT_INFINIBAND_4()`
`static EdifCell`	`GT_SWIFT_BUS()`
`static EdifCell`	`GT_XAUI_1()`
`static EdifCell`	`GT_XAUI_2()`
`static EdifCell`	`GT_XAUI_4()`
`static EdifCell`	`GT()`
`static EdifCell`	`GT10_10GE_4()`
`static EdifCell`	`GT10_10GE_8()`
`static EdifCell`	`GT10_10GFC_4()`
`static EdifCell`	`GT10_10GFC_8()`
`static EdifCell`	`GT10_AURORA_1()`
`static EdifCell`	`GT10_AURORA_2()`
`static EdifCell`	`GT10_AURORA_4()`
`static EdifCell`	`GT10_AURORAX_4()`
`static EdifCell`	`GT10_AURORAX_8()`
`static EdifCell`	`GT10_CUSTOM()`
`static EdifCell`	`GT10_INFINIBAND_1()`
`static EdifCell`	`GT10_INFINIBAND_2()`
`static EdifCell`	`GT10_INFINIBAND_4()`
`static EdifCell`	`GT10_OC192_4()`
`static EdifCell`	`GT10_OC192_8()`
`static EdifCell`	`GT10_OC48_1()`
`static EdifCell`	`GT10_OC48_2()`
`static EdifCell`	`GT10_OC48_4()`
`static EdifCell`	`GT10_PCI_EXPRESS_1()`
`static EdifCell`	`GT10_PCI_EXPRESS_2()`
`static EdifCell`	`GT10_PCI_EXPRESS_4()`
`static EdifCell`	`GT10_SWIFT_BUS()`
`static EdifCell`	`GT10_XAUI_1()`
`static EdifCell`	`GT10_XAUI_2()`
`static EdifCell`	`GT10_XAUI_4()`
`static EdifCell`	`GT10()`
`static EdifCell`	`IBUF_AGP()`
`static EdifCell`	`IBUF_CTT()`
`static EdifCell`	`IBUF_GTL_DCI()`
`static EdifCell`	`IBUF_GTL()`
`static EdifCell`	`IBUF_GTLP_DCI()`
`static EdifCell`	`IBUF_GTLP()`
`static EdifCell`	`IBUF_HSTL_I_18()`
`static EdifCell`	`IBUF_HSTL_I_DCI_18()`
`static EdifCell`	`IBUF_HSTL_I_DCI()`
`static EdifCell`	`IBUF_HSTL_I()`
`static EdifCell`	`IBUF_HSTL_II_18()`
`static EdifCell`	`IBUF_HSTL_II_DCI_18()`
`static EdifCell`	`IBUF_HSTL_II_DCI()`
`static EdifCell`	`IBUF_HSTL_II()`
`static EdifCell`	`IBUF_HSTL_III_18()`
`static EdifCell`	`IBUF_HSTL_III_DCI_18()`
`static EdifCell`	`IBUF_HSTL_III_DCI()`
`static EdifCell`	`IBUF_HSTL_III()`
`static EdifCell`	`IBUF_HSTL_IV_18()`
`static EdifCell`	`IBUF_HSTL_IV_DCI_18()`
`static EdifCell`	`IBUF_HSTL_IV_DCI()`
`static EdifCell`	`IBUF_HSTL_IV()`
`static EdifCell`	`IBUF_LVCMOS12()`
`static EdifCell`	`IBUF_LVCMOS15()`
`static EdifCell`	`IBUF_LVCMOS18()`
`static EdifCell`	`IBUF_LVCMOS2()`
`static EdifCell`	`IBUF_LVCMOS25()`
`static EdifCell`	`IBUF_LVCMOS33()`
`static EdifCell`	`IBUF_LVDCI_15()`
`static EdifCell`	`IBUF_LVDCI_18()`
`static EdifCell`	`IBUF_LVDCI_25()`
`static EdifCell`	`IBUF_LVDCI_33()`
`static EdifCell`	`IBUF_LVDCI_DV2_15()`
`static EdifCell`	`IBUF_LVDCI_DV2_18()`
`static EdifCell`	`IBUF_LVDCI_DV2_25()`
`static EdifCell`	`IBUF_LVDCI_DV2_33()`
`static EdifCell`	`IBUF_LVDS()`
`static EdifCell`	`IBUF_LVPECL()`
`static EdifCell`	`IBUF_LVTTL()`
`static EdifCell`	`IBUF_PCI33_3()`
`static EdifCell`	`IBUF_PCI33_5()`
`static EdifCell`	`IBUF_PCI66_3()`
`static EdifCell`	`IBUF_PCIX()`
`static EdifCell`	`IBUF_PCIX66_3()`
`static EdifCell`	`IBUF_SSTL18_I_DCI()`
`static EdifCell`	`IBUF_SSTL18_I()`
`static EdifCell`	`IBUF_SSTL18_II_DCI()`
`static EdifCell`	`IBUF_SSTL18_II()`
`static EdifCell`	`IBUF_SSTL2_I_DCI()`
`static EdifCell`	`IBUF_SSTL2_I()`
`static EdifCell`	`IBUF_SSTL2_II_DCI()`
`static EdifCell`	`IBUF_SSTL2_II()`
`static EdifCell`	`IBUF_SSTL3_I_DCI()`
`static EdifCell`	`IBUF_SSTL3_I()`
`static EdifCell`	`IBUF_SSTL3_II_DCI()`
`static EdifCell`	`IBUF_SSTL3_II()`
`static EdifCell`	`IBUF()`
`static EdifCell`	`IBUFDS_BLVDS_25()`
`static EdifCell`	`IBUFDS_DIFF_OUT()`
`static EdifCell`	`IBUFDS_LDT_25()`
`static EdifCell`	`IBUFDS_LVDS_25_DCI()`
`static EdifCell`	`IBUFDS_LVDS_25()`
`static EdifCell`	`IBUFDS_LVDS_33_DCI()`
`static EdifCell`	`IBUFDS_LVDS_33()`
`static EdifCell`	`IBUFDS_LVDSEXT_25_DCI()`
`static EdifCell`	`IBUFDS_LVDSEXT_25()`
`static EdifCell`	`IBUFDS_LVDSEXT_33_DCI()`
`static EdifCell`	`IBUFDS_LVDSEXT_33()`
`static EdifCell`	`IBUFDS_LVPECL_25()`
`static EdifCell`	`IBUFDS_LVPECL_33()`
`static EdifCell`	`IBUFDS_ULVDS_25()`
`static EdifCell`	`IBUFDS()`
`static EdifCell`	`IBUFG_AGP()`
`static EdifCell`	`IBUFG_CTT()`
`static EdifCell`	`IBUFG_GTL_DCI()`
`static EdifCell`	`IBUFG_GTL()`
`static EdifCell`	`IBUFG_GTLP_DCI()`
`static EdifCell`	`IBUFG_GTLP()`
`static EdifCell`	`IBUFG_HSTL_I_18()`
`static EdifCell`	`IBUFG_HSTL_I_DCI_18()`
`static EdifCell`	`IBUFG_HSTL_I_DCI()`
`static EdifCell`	`IBUFG_HSTL_I()`
`static EdifCell`	`IBUFG_HSTL_II_18()`
`static EdifCell`	`IBUFG_HSTL_II_DCI_18()`
`static EdifCell`	`IBUFG_HSTL_II_DCI()`
`static EdifCell`	`IBUFG_HSTL_II()`
`static EdifCell`	`IBUFG_HSTL_III_18()`
`static EdifCell`	`IBUFG_HSTL_III_DCI_18()`
`static EdifCell`	`IBUFG_HSTL_III_DCI()`
`static EdifCell`	`IBUFG_HSTL_III()`
`static EdifCell`	`IBUFG_HSTL_IV_18()`
`static EdifCell`	`IBUFG_HSTL_IV_DCI_18()`
`static EdifCell`	`IBUFG_HSTL_IV_DCI()`
`static EdifCell`	`IBUFG_HSTL_IV()`
`static EdifCell`	`IBUFG_LVCMOS12()`
`static EdifCell`	`IBUFG_LVCMOS15()`
`static EdifCell`	`IBUFG_LVCMOS18()`
`static EdifCell`	`IBUFG_LVCMOS2()`
`static EdifCell`	`IBUFG_LVCMOS25()`
`static EdifCell`	`IBUFG_LVCMOS33()`
`static EdifCell`	`IBUFG_LVDCI_15()`
`static EdifCell`	`IBUFG_LVDCI_18()`
`static EdifCell`	`IBUFG_LVDCI_25()`
`static EdifCell`	`IBUFG_LVDCI_33()`
`static EdifCell`	`IBUFG_LVDCI_DV2_15()`
`static EdifCell`	`IBUFG_LVDCI_DV2_18()`
`static EdifCell`	`IBUFG_LVDCI_DV2_25()`
`static EdifCell`	`IBUFG_LVDCI_DV2_33()`
`static EdifCell`	`IBUFG_LVDS()`
`static EdifCell`	`IBUFG_LVPECL()`
`static EdifCell`	`IBUFG_LVTTL()`
`static EdifCell`	`IBUFG_PCI33_3()`
`static EdifCell`	`IBUFG_PCI33_5()`
`static EdifCell`	`IBUFG_PCI66_3()`
`static EdifCell`	`IBUFG_PCIX()`
`static EdifCell`

byucc.edif.libraries.xilinx Class XilinxGenLib

byucc.edif.libraries.xilinx
Class XilinxGenLib